The process flow chart for EMI filter fabrication is shown below (the dashed box in the figure represents the manufacturing process of multilayer feedthrough capacitor chips):

Figure 1 Capacitor Chip Structure Diagram

 1.Manufacturing Process of Multilayer Feedthrough Capacitor Chips

Figure 2 Capacitor Chip Structure Diagram

2.Design of the External Dimensions of Multilayer Feedthrough Capacitor Chips

To ensure proper welding between the capacitor chip, the casing, and the leads, the inner hole of the XUANSN multilayer feedthrough capacitor chips is designed to be φ0.9mm. The outer diameter of the chip is designed to be φ2.5mm, with a tolerance of -0.1mm to +0.15mm. Considering the casing depth, product electrical parameters, and the required depth of the encapsulating material, and also considering that the capacitor thickness is directly proportional to the equivalent series resistance (ESR), where a larger ESR affects the high-frequency filtering effect, the capacitor chip thickness is designed to be 0.6mm to 1.0mm.

Based on the design results of the green capacitor chip, and considering the shrinkage coefficient (1.19) after the green film is processed into a finished capacitor chip, the relevant technical parameters are compiled. The inner/outer electrode area, margin, product outer diameter, hole diameter, and plate thickness are calculated theoretically. The calculated values are then compared with the actual values in the design database and corrected to complete the mold design and mask design. Based on the completed mold design and mask design, AutoCad software is used to design the green chip stamping mold drawing, and the graphics designed using AutoCad software are imported into Protel software to realize the screen printing mask graphic design. The inner and outer electrode patterns printed on the green dielectric film are designed (see Figure 3).

Figure 3 Printed Electrode Diagram

3.Main Calculation Formulas and Results for Chip Capacitance

According to the product capacitance requirements, the required single-layer capacitance and the number of multilayer electrode layers are calculated to solve the design problem of the electrical parameters of the feedthrough capacitor chip.

Figure 4. Single-layer capacitor structure diagram

4.According to the capacitor calculation formula:

Single-layer capacitance:       (1)

For a multilayer feedthrough capacitor chips, ε is the dielectric constant of the ceramic material, and d and t are in cm. Using a ceramic material with ε=90, the calculation is performed for a capacitance of 68pF as an example. Considering the shrinkage coefficient of the chip and the dimensions of the leads and casing, d0=1.1mm, d2=3mm. The margin is designed to be 0.3mm based on the rated voltage requirements, so d1=2.4mm and d3=1.7mm can be calculated. For a 200V rated voltage, t=125μm=0.0125cm is selected.

            (2)

To meet the 68pF capacitance requirement, the number of layers needs to be increased, and the capacitance must be increased considering the temperature characteristics and aging characteristics of the capacitor.

Total capacitance C = N × C1       (3)

Therefore, N = (68/14.35) = 4.74 ≈ 5

The electrode printing pattern size should be scaled by a shrinkage coefficient of 1.18 to 1.2. The wet film and dry film dimensions are scaled according to process specifications. In practice, 5 layers of FH900B cast film are stacked, with 5 layers of dielectric film overlapping in each layer. The capacitor chip thickness is approximately 1mm, and the capacitance is 52pF to 80pF, which is consistent with the theoretical calculation. Based on the calculation methods above, an Excel spreadsheet was designed to quickly calculate the capacitance of the chip (see Table 1).

Table 1 Capacitance Design Calculation Data Sheet for the Chip

The actual capacitance design of the chip should consider various factors affecting capacitance changes during the manufacturing process, such as the natural aging rate of the capacitor, and capacitance changes after process processing and reliability screening tests (such as welding, thermal shock, moisture exposure, and power application).  Based on statistical data from the manufacturing process, the actual capacitance required for the filter is designed.

Chip Manufacturing: In the production of multilayer feedthrough capacitor chips, one of the most important process steps in the production of single-layer dielectric ceramic capacitors is printing silver paste on the ceramic dielectric layer to form electrodes. However, its physical strength is low, and the quality reliability level cannot meet the design requirements. This project uses a multilayer stacked dielectric ceramic capacitor, similar to multiple single-layer capacitors connected in series. Therefore, it has high physical strength and high quality reliability.  According to the design requirements, the ceramic dielectric film is prepared through the main processes of printing (electrodes), stacking, isostatic pressing, dicing, punching, debinding, sintering, and electrode metallization.  A particularly important step in the production process is the repeated alignment printing of the electrodes.

In the early stages of sample production, a semi-automatic alignment printing method was used.  Manual alignment and correction of the printing pattern were performed by an operator, and then the printing equipment completed the electrode printing. This method mainly has the following problems:

① Manual alignment introduces visual errors, resulting in printing pattern deviations during printing, which will cause capacitance drift (reduction or dispersion), reducing product consistency and yield;

② As the stacking thickness increases, the distance between the screen and the printing surface gradually decreases, and the equipment cannot automatically correct this, ultimately leading to electrode pattern misalignment. After punching and through-hole metallization, the insulation resistance of the product will decrease, the withstand voltage level will also decrease, and the reliability level will be affected;

③ In mass production, any accidental manual operation or positioning error that reverses the printing sequence will result in the scrapping of the multilayer feedthrough capacitor chips. To this end, we improved the printing process, adopting high-precision fully automatic printing equipment, and developed a suitable complete process operation requirement based on the product characteristics.  We designed a multi-layer stacked dielectric ceramic capacitor printing electrode pattern according to the requirements, and then determined the number of printed layers based on the capacitance design calculation data table. Compared with the original printing method, the advantages of high-precision alignment printing technology are:

① This set of equipment uses CAM technology (computer-aided manufacturing). High-resolution cameras complete image capture, and the computer system performs image analysis and calculation. The feedback system adjusts the position of the printing platform according to the final calculation data, greatly improving the alignment accuracy and ensuring repeatable printing accuracy;

② Using layer-by-layer screen distance adjustment technology, the adjustment accuracy of the distance between the screen and the printing surface can reach 0.01mm. While ensuring the printing thickness, it can also effectively reduce the cumulative displacement deviation of the printed pattern; at the same time, the printing blade can be angle-corrected to make its contact surface with the screen flatter and the force more uniform, improving the consistency of the printed pattern thickness;

③ The positioning method is changed from traditional manual corner or positioning pin positioning to rough positioning by corners or positioning pins, followed by automatic precise positioning by the equipment, completely eliminating the influence of human and other random factors on printing accuracy.

Printing screens are made using high-precision, highly elastic, and long-life stainless steel and polyester composite screens (with polyester mesh as the support body, stretching the main part of the metal wire mesh in the middle). The combination of the highly elastic polyester mesh and high-quality steel wire mesh improves the printability and dimensional stability of the screen, ensuring the uniformity and consistency of the printed film layer during the graphic printing process.

5.The main process for chip preparation is as follows

5.1 Screen Plate Production

A tension meter and a single-plate screen stretching machine (specifically for stretching stainless steel wire mesh) were purchased, and a 300-mesh stainless steel wire mesh was selected to manufacture the screen plates. During the screen stretching process, a tension meter was used to monitor the four corners, four sides, and center position of the screen plate. This ensured the quality of the screen plate production.

5.2 Screen Printing

The screen printing process was improved in terms of positioning method and overprinting sequence.

 5.2.1 Positioning Method

During the printing process of multilayer feedthrough capacitor chips, a method of using mechanically machined positioning marks on the surface of the rigid printing substrate was adopted. This ensures that the relative position and graphic quality of the positioning marks do not change during transfer and pad printing, guaranteeing the reliability of repeated positioning accuracy. To improve the contrast between the reflective surface and the positioning marks, a coloring agent was added to the positioning holes on the rigid printing substrate. This significantly improved the imaging quality of the printing machine’s camera and the capture efficiency of the positioning holes, resulting in a capture rate of over 98%, fully meeting the process requirements.

5.2.2 Overprinting Sequence

To improve the accuracy of counting and the reliability of the printing sequence during multiple overprinting processes, serial numbers were added to the printing substrate, and each printing was counted according to the number.  Simultaneously, asymmetrical marks were added to the symmetrically structured substrate, and these were recorded and verified during each printing, greatly reducing the probability of human error.

5.3 Isostatic Pressing and Shaping

Through experiments, it was determined that setting the isostatic pressing temperature to no more than 68℃, the pressure to 20Mpa-30Mpa, and the time to 35 minutes allows the adhesive to reach its softening temperature without solvent volatilization, eliminating internal stress during printing and stamping. This avoids the problems of bubbles, delamination, and warping of the chips caused by high temperature and solvent volatilization.

5.4 Cutting and Stamping

A three-line positioning method was used for cutting and dicing, ensuring that errors of approximately 0.1mm in the cut pieces can be identified, thus meeting the cutting accuracy requirements. Since the errors in cutting and dicing are not easily reflected visually on the stamped green chips, identification graphics equivalent to the size of each chip were added to the final printed cutting pattern to represent the chip punching error.

The quality of the stamped product mainly depends on the mold, so the mold size design is particularly important. On the one hand, data on the shrinkage rate before and after firing of the raw material film should be collected based on the dimensions of the simulated product to statistically determine the most accurate shrinkage coefficient; on the other hand, the mold clearance problem should also be considered, and the size of the male and female mold clearance should be calculated based on the film thickness. If the gap is too large, the edges will be heavily burred and the cross-section will be rough after punching; if the gap is too small, it can easily damage the cutting edge or even the mold.

5.5 Pressing and Shaping

After punching, the product is slowly and steadily pressed using a special fixture and rubber pad, and then pressed and shaped in an oven (temperature 85℃, time 12h) to eliminate internal stress generated during the punching process.

5.6 Debinding and Sintering

A combined debinding and sintering process is used. This allows the solvent in the product to evaporate slowly and steadily, ensuring stable product performance.

5.7 Silver Electrode Sintering

A mature thick-film silver sintering process is used, employing a multi-atmosphere conveyor sintering furnace.  The speed, temperature, and atmosphere of the sintering furnace are controlled to improve the product’s surface oxidation and prevent contamination caused by co-firing.

In the fabrication of multilayer feedthrough capacitor chips, a uniform and dense film material should be selected. While simultaneously meeting the product’s capacitance and insulation parameters, appropriately increasing the number of layers can not only ensure that the product thickness meets the requirements (>0.7mm) but also improve the product’s mechanical strength.  Adding layers between the multilayer electrodes can also increase the chip strength. The use of hot isostatic pressing minimizes delamination, warping, bubbles, and uneven stress distribution within the same layer of the product’s green film stack. The quality of the punched and formed product mainly depends on the mold, so the mold size design is particularly important. On the one hand, data on the shrinkage rate of the green film before and after firing should be collected based on the simulated product dimensions to determine the most accurate shrinkage coefficient; on the other hand, the mold gap must be considered, and the size of the punch and die gap should be calculated based on the film thickness. If the gap is too large, the edges will be heavily burred and the cross-section will be rough after punching; if the gap is too small, it can easily damage the cutting edge or even the mold. The pressure-baking and debinding process utilizes an optimized drying and debinding curve to allow additives such as adhesives to volatilize slowly and evenly during the membrane manufacturing process. This reduces the effects of delamination and porosity caused by the volatilization of these substances in the ceramic substrate, improving the density of the membrane.  Simultaneously, it ensures uniform crystal grain formation within the substrate and even distribution of internal stress, enhancing the product’s resistance to external impact and vibration, thereby further improving the mechanical strength and reliability of the product. Through this process, XUANSN has successfully achieved mass production of high-precision, multilayer feedthrough capacitor chips, ensuring stable performance and long-term reliability of the chips in EMI filter applications, providing customers with high-quality capacitor solutions.